Neuromorphic Computing
We are witnessing the revival of artificial intelligence (term first used in 1956), thanks to the combination of knowledge in biological neuroscience, computational neuroscience, and the availability of better computational resources thanks to advances in nanotechnology.
Neuromorphic computing or engineering is a rapidly developing area of research in which elements of a system are modeled after the human brain and nervous system. The term may refer to the design of both hardware and software computing elements. This research area focuses on how knowledge from neuroscience can be combined with new techniques from nanotechnologies to build physical systems that “sense” and compute by imitating the brain.
Projects
- NEUROWARE (PGC2018-097339)
- TOLERA2 (TEC2015-65902)
PhD Thesis
- Resistive RAM: simulation and modeling for reliable design. Fernando García Redondo.
Master Thesis
- Gracia Herranz, Amadeo de (Jan. 2019). Design of a multi-level driver for memristors to be used in neuromorphic applications
- Iñaki Ormaetxea (June 2018) Design and Implementation of an FPGA-based Hardware Accelerator for Spiking Neural Networks
- Miguel Molina (July 2020) Design and Implementation of a Configurable Multilayer Perceptron (MLP) in FPGA.
PUBLICATIONS
Journals
- Self-controlled multilevel writing architecture for fast training in neuromorphic RRAM applications. F. García-Redondo, M. López-Vallejo. Nanotechnology 29 (40). Jul. 2018.
- Auto-Erasable RRAM Architecture Secured Against Physical and Firmware Attacks, F. García-Redondo;M. López-Vallejo; in IEEE Trans. on Circuits and Systems I: Regular Papers 2018. Volume: 65, Issue: 5, May 2018. doi: 10.1109/TCSI.2017.2755123.
- On the Design and Analysis of Reliable RRAM-CMOS Hybrid Circuits. Fernando García-Redondo; Marisa López-Vallejo. IEEE Transactions on Nanotechnology . Volume: 16, Issue: 3, Pages 514-522. July 2017. DOI: 10.1109/TNANO.2017.2697311
- Reconfigurable Writing Architecture for Reliable RRAM Operation in Wide Temperature Ranges, F. García-Redondo; P. Royer; M. López-Vallejo; H. Aparicio; P. Ituero; C. A. López-Barrio, in IEEE Trans. on Very Large Scale Integration (VLSI) Systems, Volume: 25, Issue: 4, April 2017. Impact Factor (2014): 1.245. doi: 10.1109/TVLSI.2016.2634083.
- SPICE Compact Modeling of Bipolar/Unipolar Memristor Switching Governed by Electrical Thresholds, F. García-Redondo, R. P. Gowers, A. Crespo-Yepes, M. López-Vallejo and L. Jiang, in IEEE Trans. on Circuits and Systems I: Regular Papers, vol. 63, no. 8, pp. 1255-1264, Aug. 2016. doi: 10.1109/TCSI.2016.2564703
Conference papers
- “Temperature-aware writing architecture for multilevel memristive cells”, A. de Gracia and M. Lopez-Vallejo. 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS). July 2019
- Advanced integration of variability and degradation in RRAM SPICE compact models Fernando García-Redondo; Marisa López-Vallejo; Carlos López Barrio, 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Italy, June 2017.
