Víctor Manuel Bautista received the Bachelor of Engineering in Telecommunication Technologies and Services Engineering in July 2021 and the Master in Electronic Systems Engineering (MUISE) in July 2022 from the Technical University of Madrid (UPM). He is working in his PhD since September 2022.
His research focuses on hardware architectures for signal processing for 5G and 6G, with special interest in the design of efficient circuits in FPGAs for the fast Fourier transform (FFT).
Research
- Fast Fourier Transform
- Signal Processing Architectures
- Hardware Acceleration
- FPGAs
Teaching
Publications
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Víctor Manuel Bautista, Mario Garrido and Marisa López-Vallejo, “Serial Butterflies for Non-Power-of-Two FFT Architectures in 5G and Beyond”, IEEE Trans. Circuits Syst. I, 2023. (Open Access in IEEE).
Víctor Manuel Bautista and Mario Garrido, “An Automatic Generator of Non-Power-of-Two SDF FFT Architectures for 5G and Beyond”, Conference on Design of Circuits and Integrated Systems, Málaga (Spain), pp. 61-66, Nov. 2023.
