Saltar al contenido

Mario Garrido

Associate Professor
Linkedin Researchgate Orcid Phone-alt Envelope Home

Office: B-113

Mario Garrido received the M.Sc. degree in electrical engineering and the Ph.D. degree from Universidad Politécnica de Madrid (UPM), Spain, in 2004 and 2009, respectively. In 2010 he moved to Sweden to work as a postdoctoral researcher at the Department of Electrical Engineering at Linköping University. From 2012 to 2019 he was Associate Professor at the same department. In 2019 he returned to UPM with a Ramón y Cajal Research Fellowship and since 2024 he has been an Associate Professor at the Department of Electronic Engineering at UPM. So far, he has been author of more than 50 scientific publications, and he appeared in the “World’s Top 2% Scientists List” elaborated by Standford University in 2022, 2023 and 2024.

His research focuses on optimized hardware design for signal processing applications. This includes the design of hardware architectures for the fast Fourier transform (FFT), circuits for data management, the CORDIC algorithm, neural networks, and circuits to calculate statistical and mathematical operations. His research covers high-performance circuits for real-time computation, as well as designs for small area and low power consumption.

Research

Research

  • Fast Fourier transform hardware architectures
  • Circuits for data permutation
  • Hardware architectures for 5G and 6G
  • Neural networks
  • CORDIC
  • Circuits for statistical and mathematical operations
Teaching

Teaching

  • LCSE: Circuits and Electronic Systems Laboratory

Publications

  1.  Mario Garrido, Víctor Manuel Bautista, Alejandro Portas and Javier Hormigo, “Advanced Quantization Schemes to Increase Accuracy, Reduce Area, and Lower Power Consumption in FFT Architectures”, IEEE Trans. Circuits Syst. I, Accepted for Publication.
  2. Zeynep Kaya and Mario Garrido, “Optimized 4-Parallel 1024-Point MSC FFT”, IEEE Access, Vol. 12, pp. 84110-84121, Jun. 2024. (Open Access in IEEE).
  3. Víctor Manuel Bautista, Mario Garrido and Marisa López-Vallejo, “Serial Butterflies for Non-Power-of-Two FFT Architectures in 5G and Beyond”, IEEE Trans. Circuits Syst. I, Vol. 70, No. 10, pp. 3992-4003, Oct 2023. (Open Access in IEEE).
  4. Zeynep Kaya and Mario Garrido, “Low-Latency 64-Parallel 4096-Point Memory-Based FFT for 6G”, IEEE Trans. Circuits Syst. I, Vol. 70, No. 10, pp. 4004-4014, Oct. 2023. (Open Access in IEEE).
  5. Pedro Paz and Mario Garrido, “CORDIC-Based Computation of Arcsine and Arccosine Functions on FPGA”, IEEE Trans. Circuits Syst. II, Vol. 70, No. 9, pp. 3684-3688,  Sep. 2023. (Open Access in IEEE).
  6. Zeynep Kaya, Mario Garrido and Jarmo Takala, “Memory-Based FFT Architecture with Optimized Number of Multiplexers and Memory Usage”, IEEE Trans. Circuits Syst. II, Vol. 70, No. 8, pp. 3084-3088, Aug. 2023. (Open Access in IEEE)
  7. Guang-Ting Deng, Mario Garrido, Sau-Gee Chen and Shen-Jui Huang, “Radix-2k MSC FFT Architectures”, IEEE Access, Vol. 11, pp. 81497-81510, July 2023. (Open Access in IEEE).
  8. Pedro Paz and Mario Garrido, “Efficient Implementation of Complex Multipliers on FPGAs Using DSP Slices”, J. Signal Process. Syst, Vol. 95, pp. 543-550, Apr. 2023. (Open Access in Springer).
  9. Mario Garrido, “A Survey on Pipelined FFT Hardware Architectures”,  J. Signal Process. Syst., Vol. 94, No. 11, pp. 1345-1364, Nov. 2022. (Open Access in Springer).
  10. Mario Garrido, “Simplifying Karnaugh Maps by Making Groups of Non-power-of-two Elements”, Circuits, Syst. Signal Process., Vol. 41, No. 10, pp. 5895–5902, Oct. 2022. (Open Access in Springer).
  11. Mario Garrido and Pedro Paz, “Optimum MDC FFT Hardware Architectures in Terms of Delays and Multiplexers”, IEEE Trans. Circuits Syst. II, Vol.68, No. 3, pp. 1003-1007, Mar. 2021 (Open Access in IEEE).
  12. Mario Garrido and Pedro Malagón, “The Constant Multiplier FFT”, IEEE Trans. Circuits Syst. I, Vol. 68, No. 1, pp. 322-335, Jan. 2021 (Open Access in IEEE).
  13. Rikard Anderesson and Mario Garrido, “Using Rotator Transformations to Simplify FFT Hardware Architectures”, IEEE Trans. Circuits Syst, I, Vol. 67, no. 12, pp. 4784-4793, Dec. 2020 (Open Access in IEEE).
  14. Narges Mohammadi, Oscar Gustafsson and Mario Garrido, “Using Transposition to Efficiently Solve Constant Matrix-Vector Multiplication and Sum of Product Problems”, J. Signal Process. Syst.,  Vol. 92, no 10, pp. 1075-1089, Oct. 2020 (Open Access in Springer).
  15. Mario Garrido and Peter Pirsch, “Continuous-Flow Matrix Transposition using Memories”, IEEE Trans. Circuits Syst. I, Vol. 67, No. 9, pp. 3035-3046, Sep. 2020 (Open Access in IEEE).
  16. Hans Kanders, Tobias Mellqvist, Mario Garrido, Kent Palmkvist and Oscar Gustafsson, “A 1 Million-Point FFT on a Single FPGA”, IEEE Trans. Circuits Systems I, Vol. 66, No. 10, pp. 3863-3873, Oct. 2019.  (IEEE Xplore, Open Access)
  17. Mario Garrido, Jesús Grajal and Oscar Gustafsson. “Optimum Circuits for Bit-Dimension Permutations”, IEEE Trans. VLSI, Vol. 27, No. 5, pp. 1148-1160, May 2019. (IEEE Xplore, Open Access)
  18. Mario Garrido, “Multiplexer and Memory-Efficient Circuits for Parallel Bit Reversal”, IEEE Trans. Circuits Systems II, Vol. 66, No. 4, pp. 657-661, Apr. 2019. (IEEE Xplore, Open Access).
  19. Mario Garrido, Konrad Möller and Martin Kumm, “World’s Fastest FFT Architectures: Breaking the Barrier of 100 GS/s”, IEEE Trans. Circuits Systems I, Vol. 66, No. 4, pp. 1507-1516, Apr. 2019. (IEEE Xplore, Open Access)
  20. Mario Garrido, Nanda K. Unnikrishnan and Keshab K. Parhi, “A Serial Commutator Fast Fourier Transform Architecture for Real-Valued Signals”, IEEE Trans. Circuits Systems II, Vol. 65, No. 11, pp. 1693-1697, Nov. 2018.  (IEEE Xplore, Open Access)
  21. Martin Kumm, Oscar Gustafsson, Mario Garrido and Peter Zipf, “Optimal Single Constant Multiplication using Ternary Adders”, IEEE Trans. Circuits Systems II, Vol. 65, No. 7, pp 928-932, July 2018. (IEEE Xplore, Open Access).
  22. Konrad Möller, Martin Kumm, Mario Garrido and Peter Zipf, “Optimal Shift Reassignment in Reconfigurable Constant Multiplication Circuits”, IEEE Trans Computer-Aided Design Integrated Circuits Systems, Vol. 37, No. 3, pp. 710-714, Mar. 2018.  (IEEE Xplore, Open Access).
  23. Mario Garrido, Shen-Jui Huang and Sau-Gee Chen, “Feedforward FFT Hardware Architectures based on Rotator Allocation”, IEEE Trans. Circuits Systems I, Vol. 65, No. 2, pp. 581-592, Feb. 2018. (IEEE Xplore, Open Access).
  24. Mario Garrido, Miguel Ángel Sánchez, María Luisa López-Vallejo and Jesús Grajal, “A 4096-point Radix-4 Memory-Based FFT using DSP Slices”, IEEE Trans. VLSI, Vol. 25, No. 1, pp. 375-379, Jan. 2017.  (IEEE Xplore, Open Access).
  25. Mario Garrido, “A new Representation of FFT Algorithms using Triangular Matrices”, IEEE Trans. Circuits Systems I, Vol. 63, No. 10, pp. 1737-1745, Oct. 2016. (IEEE Xplore, Open Access).
  26. Mario Garrido, Shen-Jui Huang, Sau-Gee Chen and Oscar Gustafsson, “The Serial Commutator (SC) FFT”, IEEE Trans. Circuits Systems II, Vol. 63, No. 10, pp. 974-978, Oct. 2016. (IEEE Xplore, Open Access).
  27. Mario Garrido, Rikard Andersson, Fahad Qureshi and Oscar Gustafsson, “Multiplierless Unity-Gain SDF FFTs”, IEEE Trans. VLSI, Vol. 24, No. 9, pp. 3003-3007, Sep. 2016. (IEEE Xplore, Open Access).
  28. Mario Garrido, “The Feedforward Short-Time Fourier Transform”, IEEE Trans. Circuits Systems II, Vol. 63, No. 9, pp. 868-872, Sep. 2016. (IEEE Xplore, Open Access).
  29. Mario Garrido, Petter Kallstrom, Martin Kumm, Oscar Gustafsson, “CORDIC II: A New Improved CORDIC Algorithm”, IEEE Trans. Circuits Systems II, Vol. 63, No. 2, pp. 186-190, Feb. 2016. (IEEE Xplore, Open Access).
  30. Sau-Gee Chen, Shen-Jui Huang, Mario Garrido and Shyh-Jye Jou, “Continuous-flow Parallel Bit-Reversal Circuit for MDF and MDC FFT Architectures”, IEEE Trans. Circuits Systems I, Vol. 61, No. 10, pp. 2869-2877, Oct. 2014. (IEEE Xplore, Open Access).
  31. Mario Garrido, Fahad Qureshi and Oscar Gustafsson, “Low-Complexity Multiplierless Constant Rotators Based on Combined Coefficient Selection and Shift-and-Add Implementation (CCSSI)”, IEEE Trans Circuits Systems I, Vol. 61, No. 7, Pages 2002-2012, July 2014. (IEEE Xplore, Open Access).
  32. Mario Garrido and Jesús Grajal, “Continuous-flow variable-length memoryless linear regression architecture”, Electronics Letters, Vol. 49, Issue 24, Pages 1567-1569, Nov 2013. (IEEE Xplore, Open Access).
  33. Fahad Qureshi, Mario Garrido and Oscar Gustafsson, “Unified architecture for 2, 3, 4, 5, and 7-point DFTs based on Winograd Fourier transform algorithm”, Electronics Letters, Vol. 49, Issue 5, Pages 348-349, May 2013.  (IEEE Xplore, Open Access).
  34. Mario Garrido, Jesús Grajal, M.A. Sánchez and O. Gustafsson, “Pipelined Radix-2k Feedforward FFT Architectures”, IEEE Trans. VLSI, Vol. 21, Issue 1, Pages 23-32, Jan 2013. (IEEE Xplore, Open Access).
  35. Mario Garrido, Jesús Grajal and Oscar Gustafsson, “Optimum Circuits for Bit Reversal”, IEEE Trans. Circuits Systems II, Vol. 58, Issue 10, Pages 657-661, Oct. 2011. Nominated to the Best Paper Award. (IEEE Xplore, Open Access).
  36. Mario Garrido, Oscar Gustafsson and Jesús Grajal, “Accurate Rotations Based on Coefficient Scaling”, IEEE Trans. Circuits Systems II, Vol. 58, Issue 10, Pages 662-666, Oct. 2011. (IEEE Xplore, Open Access).
  37. Mario Garrido, Keshab K. Parhi and Jesús Grajal, “A Pipelined FFT Architecture for Real-Valued Signals”, IEEE Trans. Circuits Systems I, Vol. 56, Issue 12, Pages 2634-2643, Dec. 2009. (IEEE Xplore, Open Access).
  38. Miguel Ángel Sánchez, Mario Garrido, María Luisa López-Vallejo and Jesús Grajal, “Implementing FFT-based Digital Channelized Receivers on FPGA Platforms”, IEEE Trans, Aerospace  Electronic Systems, Volume 44, Issue 4, Pages 1567-1585, Oct. 2008. (IEEE Xplore, Open Access).

  1. M. Garrido, F. Qureshi, J. Takala, and O. Gustafsson. “Hardware architectures for the fast Fourier transform”, In S. S. Bhattacharyya, E. F. Deprettere, R. Leupers, and J. Takala, editors, Handbook of Signal Processing Systems. Springer, third edition, 2019. 

  1. M. Garrido, M. L. López-Vallejo and S.-G. Chen, “Guest editorial: Special section on fast Fourier transform (FFT) hardware implementations”, J. Signal Proc. Systems, Vol. 90, No. 11, pp. 1581-1582, Nov. 2018. (Open Access)
  1. Mario Garrido, Ignacio Aldama, José María Álvarez, David Severiano, Jorge Menéndez, Javier García and Rubén Sevilla, “Virtual Network Functions Allocation in a Datacenter based on Extinction Factor”, US 10768963. Publication date:  08.09.2020. Priority date: 31.07.2017. Priority number: US201715665022. (PDF)
  2. Mario Garrido and Andreas Öhlin, “Device and method for performing a Fourier transform on a three dimensional data set”, SE 539721. Publication date: 07.11.2017. Priority date: 09.07.2014. Priority number: SE1450880. (PDF)
  3. Mario Garrido and J. Grajal, “Procedimiento y Arquitectura de Circuito en Pipeline para el Cálculo de la Regresión Lineal” (Procedure and Pipelined Hardware Architecture for Computing the Linear Regression), ES 2365883. Publication date: 13.10.2011. Priority date: 20.05.2009. Priority number: ES20090001256. (PDF)
  4. Mario Garrido and J. Grajal, “Storage-free Method and Architecture for Computing FFT Rotations”, WO 2008/125708. Publication date: 16.03.2008. Priority date: 12.04.2007. Priority number: ES20070000983. (PDF)
  1. Zeynep Kaya and Mario Garrido, “Novel Access Patterns Based on Overlapping Loading and Processing Times to Reduce Latency and Increase Throughput in Memory-based FFTs”, IEEE International Symposium on Computer Arithmetic, Málaga (Spain), Jun. 2024.
  2. Víctor Manuel Bautista and Mario Garrido, “An Automatic Generator of Non-Power-of-Two SDF FFT Architectures for 5G and Beyond”, Conference on Design of Circuits and Integrated Systems, Málaga (Spain), pp. 61-66, Nov. 2023.
  3. Pedro Paz and Mario Garrido, “A 5.2 GSps 8-Parallel 1024-Point MDC FFT”, Conference on Design of Circuits and Integrated Systems, Málaga (Spain), pp. 55-60, Nov. 2023.
  4. Charalampos Eleftheriadis, Mario Garrido and Georgio Karakonstantis, “Energy-Efficient Short-Time Fourier Transform for Partial Window Overlapping”, International Symposium on Circuits and Systems (ISCAS), Monterrey, CA (United States), May 2023.
  5. Mario Garrido, “Evolution of the Performance of Pipelined FFT Architectures Through the Years”, Conference on Design of Circuits and Integrated Systems, Segovia (Spain), Nov. 2020.
  6. Shun-Che Hsu, Shen-Jui Huang, Sau-Gee Chen, Shin-Che Lin and Mario Garrido , “A 128-Point Multi-Path SC FFT Architecture, IEEE International Symposium on Circuits and Systems, Sevilla (Spain), Oct. 2020.
  7. Nanda K. Unnikrishnan, Mario Garrido and Keshab K. Parhi, “Effect of Finite Word-Length on SQNR, Area and Power for Real-Valued Serial FFT” IEEE International Symposium on Circuits and Systems, Sapporo (Japan), May 2019.
  8. M. Gokhale, C. Bae, O. Gustafsson and M. Garrido, “Improved Implementation Approaches for 512-tap 60 GSa/s Chromatic Dispersion FIR Filters”, IEEE Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, CA (United States), Oct. 2018.
  9. N. Mohammadi, O. Gustafsson and M. Garrido, “Obtaining Minimum Depth Sum of Products from Multiple Constant Multiplication”, IEEE International Workshop on Signal Processing Systems, Cape Town (South Africa), Oct. 2018.
  10. A. Kovalev, O. Gustafsson and M. Garrido, “Implementation Approaches for 512-tap 60 GSa/s Chromatic Dispersion FIR Filters”, IEEE Asilomar Conf. Signals Systems Computers, Pacific Grove, CA (US), Nov. 2017.
  11. M. Garrido, M. Acevedo, A. Ehliar and O. Gustafsson, “Challenging the Limits of FFT Performance on FPGAs”, International Symposium on Integrated Circuits (ISIC-2014), Singapore, December 2014, pp. 172-175. Invited Paper.
  12. V. Iglesias, J. Grajal, O. Yeste-Ojeda, M. Garrido, M.A. Sánchez, M.L. López-Vallejo, “Real-time Radar Pulse Parameter Extractor”, Radar Conference, Cincinnati, OH (USA), May 2014, pp. 371-375.
  13. S. Ambuluri, M. Garrido, G. Caffarena, J. Ogniewski and I. Ragnemalm, “New Radix-2 and Radix-22 Constant Geometry Fast Fourier Transform Algorithms For GPUs”, IADIS Computer Graphics, Visualization, Computer Vision and Image Processing (CGVCVIP) Conference, Prague (Czech Republic), July 2013, pp. 59-66. Best paper award.
  14. P.P. Boopal, M. Garrido and O. Gustafsson, “A Reconfigurable FFT Architecture for Variable-Length and Multi-Streaming OFDM Standards”, IEEE International Symposium on Circuits and Systems (ISCAS), Beijing (China) May 2013, pp. 2066-2070.
  15. P. Källström, M. Garrido, O. Gustafsson, “Low-complexity rotators for the FFT using base-3 signed stages,” IEEE Asia Pacific Conference on Circuits and Systems, Kaoshiung (Taiwan), Dec. 2012, pp. 519-522.
  16. T. Ahmed, M. Garrido and O. Gustafsson, “A 512-point 8-parallel pipelined feedforward FFT for WPAN”, IEEE Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, CA (United States), Nov. 2011.
  17. J. Grajal, O.A. Yeste, M.A. Sánchez, M. Garrido and M.L. López-Vallejo, “Real Time FPGA Implementation of an Modulation Classifier for Electronic Warfare Applications”, European Signal Processing Conference, Barcelona (Spain), Aug. 2011.
  18. F. Qureshi, M. Garrido and O. Gustafsson, “Alternatives for Low-Complexity Complex Rotators”, IEEE International Conference on Electronics, Circuits, and Systems (ICECS’10), Athens (Greece), Dec. 2010.
  19. Mario Garrido and J. Grajal, “Efficient Memoryless CORDIC for FFT Computation”, IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP’07), vol. 2, pp. II-113 – II-116, Honolulu (United States), Apr. 2007.
  20. M.A. Sánchez, M. Garrido, M. L. López-Vallejo and C. López-Barrio,”Automated Design Space Exploration of FPGA-based FFT Architectures based on Area and Power estimation”, IEEE International Conference on Field Programmable Technology (FPT’06), Bangkok (Thailand), Dec. 2006.
  21. M.A. Sánchez, M. Garrido, M. L. López-Vallejo and C. López-Barrio, “Fast and Accurate Estimation of Area and Power for FPGA-based Signal Processing Architectures”, Intenational Conference on Design of Circuits and Integrated Systems (DCIS’06), Barcelona (Spain), Nov. 2006.
  22. M.A. Sánchez, M. Garrido, M. L. López-Vallejo, J. Grajal and C. López-Barrio, “Implementing the Monobit FFT on FPGA Platforms”, Intenational Conference on Design of Circuits and Integrated Systems (DCIS’05), Lisboa (Portugal), Nov. 2005.
  23. M.A. Sánchez, M. Garrido, M. L. López-Vallejo, J. Grajal and C. López-Barrio, “Digital Channelised Receivers on FPGAs Platforms”. IEEE Radar Conference, Pages 816-821, Washington D.C. (EEUU), May 2005.
  24. M.A. Sánchez, M. Garrido, M. L. López-Vallejo and J. Grajal, “Implementing the FFT Algorithm on FPGA Platforms: A Comparative Study of Parallel Architectures”, International Conference on Design of Circuits and Integrated Systems (DCIS’04), Bourdeaux (France), Nov. 2004.