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Juan Antonio López Martín

Associate Professor

Juan A. López received the Ingeniero de Telecomunicación degree from the Universidad de Málaga in 1997, and the Doctor Ingeniero de Telecomunicación degree from the Universidad Politécnica de Madrid (UPM) in 2004. Since November 1997, he has been with the Departamento de Ingeniería Electrónica, UPM, where he is currently an Associate Professor.

He has been a member of more than 30 R&D projects about the development of CAD tools and the implementation of very high-speed digital signal and image processing systems in different applications.

His research interests include design automation, interval methods, and hardware implementation of DSP systems, particularly the fixed-point properties of the linear and non-linear structures, quantization and fast evaluation of the finite word-length effects. He has authored or co-authored more than 30 papers in specialized journals and major congresses of these areas.

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Research

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Teaching

Publications

  1. P. Barrio, C. Carreras, J.A. López, ?. Robles, R. Jevtic, and R. Sierra. Memory optimization in fpga-accelerated scientific codes based on unstructured meshes. Journal of Systems Architecture, 60(7):579–591, 2014.

  2. S. Hernandez-Montero, J. A. Lopez, M. Sanchez, L. Esteban, and C. A. Lopez. Real time FPGA-based crosstalk elimination for multichannel interferometry systems in fusion diagnostics. IEEE Transactions on Nuclear Science, 60(5):3585–3591, oct 2013. URL: https://doi.org/10.1109%2Ftns.2013.2272892, doi:10.1109/tns.2013.2272892.

  3. Luis Esteban, J. A. Lopez, E. Sedano, S. Hernandez-Montero, and M. Sanchez. Quantization analysis of the infrared interferometer of the TJ-II stellarator for its optimized FPGA-based implementation. IEEE Transactions on Nuclear Science, 60(5):3592–3596, oct 2013. URL: https://doi.org/10.1109%2Ftns.2013.2278918, doi:10.1109/tns.2013.2278918.

  4. Gabriel Caffarena, Olivier Sentieys, Daniel Menard, Juan A. López, and David Novo. Quantization of VLSI digital signal processing systems. EURASIP Journal on Advances in Signal Processing, feb 2012. URL: https://doi.org/10.1186%2F1687-6180-2012-32, doi:10.1186/1687-6180-2012-32.

  5. Luis Esteban, Miguel Sanchez, Juan Antonio Lopez, Petra Kornejew, Matthias Hirsch, and Octavio Nieto-Taladriz. Development of efficient FPGA-based multi-channel phase meters for IR-interferometers. IEEE Transactions on Nuclear Science, 58(4):1562–1569, aug 2011. URL: https://doi.org/10.1109%2Ftns.2011.2159739, doi:10.1109/tns.2011.2159739.

  6. L. Esteban, M. Sánchez, J. Sánchez, P. Kornejew, M. Hirsch, J. A. López, A. Fernández, and O. Nieto-Taladriz. Continuous phase measurement in the w7-x infrared interferometer by means of a FPGA and high-speed ADCs. Fusion Science and Technology, 58(3):771–777, nov 2010. URL: https://doi.org/10.13182%2Ffst10-9, doi:10.13182/fst10-9.

  7. L. Esteban, M. Sánchez, J.A. López, O. Nieto-Taladriz, and J. Sánchez. Continuous plasma density measurement in TJ-II infrared interferometer—advanced signal processing based on FPGAs. Fusion Engineering and Design, 85(3-4):328–331, jul 2010. URL: https://doi.org/10.1016%2Fj.fusengdes.2010.03.036, doi:10.1016/j.fusengdes.2010.03.036.

  8. G. Caffarena, C. Carreras, J.A. Lpez, and ?. Fernández. Sqnr estimation of fixed-point dsp algorithms. Eurasip Journal on Advances in Signal Processing, 2010.

  9. J.A. López, G. Caffarena, C. Carreras, and O. Nieto-Taladriz. Fast and accurate computation of the round-off noise of linear time-invariant systems. IET Circuits, Devices and Systems, 2(4):393–408, 2008.

  10. J.A. López, C. Carreras, and O. Nieto-Taladriz. Improved interval-based characterization of fixed-point lti systems with feedback loops. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 26(11):1923–1933, 2007.

  11. Gabriel Caffarena, Olivier Sentieys, Daniel Menard, Juan Antonio Lopez, and David Novo. Quantization of VLSI digital signal processing systems. EURASIP Journal on Advances in Signal Processing, 2012:1–2, February 2012. URL: https://hal.inria.fr/hal-00743410.

  12. J. A. Lopez, G. Caffarena, C. Carreras, and O. Nieto-Taladriz. Optimizing the Hardware Implementation of Constant Coefficient Dividers Using the Properties of the Quantization Operations. WSEAS Trans. Circ. Syst., 4(5):462–470, may 2005.

  1. S. Hernandez-Montero, J. A. Lopez, M. Sanchez, and L. Esteban. Real time FPGA-based crosstalk elimination for multichannel interferometry systems in fusion diagnostics. In 2012 18th IEEE-NPSS Real Time Conference. IEEE, jun 2012. URL: https://doi.org/10.1109%2Frtc.2012.6418377, doi:10.1109/rtc.2012.6418377.

  2. E. Sedano, J.A. López, and C. Carreras. A fast interpolative wordlength optimization method for dsp systems. SPL 2012 – 8th Southern Programmable Logic Conference, 2012.

  3. G. Caffarena, C. Carreras, J.A. López, and A. Fernández. Fast fixed-point optimization of dsp algorithms. Proceedings of the 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2010, pages 195–200, 2010.

  4. G. Caffarena, J.A. López, C. Carreras, and O. Nieto-Taladriz. High-level synthesis of multiple word-length dsp algorithms using heterogeneous-resource fpgas. Proceedings – 2006 International Conference on Field Programmable Logic and Applications, FPL, pages 675–678, 2006.

  5. G. Caffarena, J.A. López, C. Carreras, and O. Nieto-Taladriz. Optimized synthesis of dsp cores combining logic-based and embedded fpga resources. 2006 International Symposium on System-on-Chip, SOC, 2006.

  6. C. Carreras, J.A. López, and O. Nieto-Taladriz. Bit-width selection for data-path implementations. Proceedings of the International Symposium on System Synthesis, 1999.

  7. J. A. Lopez, E. Sedano, C. Carreras, and C. López. Interval-based analysis and word-length optimization of non-linear systems with control-flow structures. In Proc. Int. Conf. Comput. Methods, volume 3, 1333–1342. aug 2016.

  8. Enrique Sedano, Juan A. López, and Carlos Carreras. Acceleration of monte-carlo simulation-based quantization of dsp systems. In 2012 19th International Conference on Systems, Signals and Image Processing (IWSSIP), volume, 189–192. 2012. doi:.

  9. J. A. Lopez, J.M. Díez, C. Carreras, G. Caffarena, and O. Nieto-Taladriz. Analysis of the Number of Multipliers in Radix-2 FFT Modules with Different Latency and Area Constraints. In Proc. of the Design of Circuits and Integrated Systems, DCIS’01, volume, 1–6. nov 2001. doi:.

  1. Daniel Menard, Gabriel Caffarena, Juan Antonio Lopez, David Novo, and Olivier Sentieys. Fixed-point refinement of digital signal processing systems. In Digitally Enhanced Mixed Signal Systems, number Chapter 1, pages 1–37. The Institution of Engineering and Technology, May 2019. URL: https://hal.inria.fr/hal-01941898, doi:10.1049/PBCS040E\_ch.

  2. Daniel Ménard, Gabriel Caffarena, Juan Antonio Lopez, David Novo, and Olivier Sentieys. Analysis of Finite Word-Length Effects in Fixed-Point Systems. In Shuvra S. Bhattacharyya, editor, Handbook of Signal Processing Systems, pages 1063–1101. 2019. URL: https://hal.inria.fr/hal-01941888, doi:10.1007/978-3-319-91734-4\_29.

  3. G. Caffarena, ?. Fernández-Herrero, J.A. López, and C. Carreras. Fast fixed-point optimization of dsp algorithms. IFIP Advances in Information and Communication Technology, 373:183–205, 2012.

  1. Dan Werthimer et al. PIDDP Spectrometer – Single-chip Planetary Low-power ASIC Spectrometer with High-resolution (SPLASH). 2013. https://casper.astro.berkeley.edu/wiki/PIDDP_Spectrometer.

  2. J. A. Lopez. Evaluación de los efectos de cuantificación en las estructuras de filtros digitales mediante técnicas de simulación basadas en extensiones de intervalos. PhD thesis, ETSI Telecomunicacion, UPM, sep 2004. URL: http://oa.upm.es/33/.